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INTEGRATED CIRCUITS
74F647 Octal transceiver/register, non-inverting (open-collector) 74F649 Octal transceiver/register, inverting (open-collector)
Product specification IC15 Data Handbook 1992 Feb 28
Philips Semiconductors
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647 Octal Transceiver/Register, Non-inverting (Open Collector) 74F649 Octal Transceiver/Register, Inverting (Open Collector)
FEATURES
74F647/74F649
* High impedance NPN base inputs for reduced loading
(20A in High and Low states)
* Independent registers for A and B buses * Multiplexed real-time and stored data * Choice of non-inverting and inverting data paths * Open Collector outputs * 300 mil wide 24-pin Slim Dip package
DESCRIPTION
The 74F647 and 74F649 Transceivers/Registers consist of bus transceiver circuits with open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a High logic level. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The select (SAB, SBA) controls can multiplex stored and real-time (transparent mode) data. The DIR determines which bus will receive
data when the Output Enable, OE is active Low. In the isolation mode (Output Enable, OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74F647 and 74F649. TYPICAL fmax 65MHz 65MHz TYPICAL SUPPLY CURRENT (TOTAL) 125mA 125mA
TYPE 74F647 74F649
ORDERING INFORMATION
DESCRIPTION 24-pin plastic Slim DIP (300mil) 24-pin plastic SOL COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F647N, N74F649N N74F647D, N74F649D PKG DWG # SOT222-1 SOT137-1
PIN CONFIGURATION - 74F647
CPAB 1 SAB 2 DIR 3 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
PIN CONFIGURATION - 74F649
CPAB 1 SAB 2 DIR 3 24 VCC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7
A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12
A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12
SF01196
SF01196
1992 Feb 28
2
853-0876 05853
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
LOGIC SYMBOL - 74F647
4 5 6 7 8 9 10 11
LOGIC SYMBOL - 74F649
4 5 6 7 8 9 10 11
A0 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0
A1
A2
A3
A4
A5
A6
A7 A0 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 A1 A2 A3 A4 A5 A6 A7
B1
B2
B3
B4
B5
B6
B7
VCC=Pin 24 GND=Pin 12
20
19
18
17
16
15
14
13
SF01197
VCC=Pin 24 GND=Pin 12
20
19
18
17
16
15
14
13
SF01198
LOGIC SYMBOL - 74F647
21 3 23 C4 22 1 2 C6 G7 1 1 5 6D 1 5 6 7 8 9 10 11 7 7 1 1 2 5 4D 20 G5 G3 3EN1(BA) 3EN2(AB)
LOGIC SYMBOL - 74F648
21 3 G3 3EN1(BA) 3EN2(AB) 23 22 1 2 C6 G7 1 1 5 6D 19 18 17 16 15 14 13 1 5 6 7 8 9 10 11 7 7 1 1 2 5 4D 20 C4 G5
4
4
19 18 17 16 15 14 13
SF01199
SF01200
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A OR B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
OE L
DIR CPAB CPBA L X X
SAB X
SBA L
OE L
DIR CPAB CPBA H X X
SAB L
SBA X
OE X X H
DIR CPAB CPBA X X X X X
SAB X X X
SBA X X X
OE L L
DIR CPAB CPBA L H X H or L H or L X
SAB X H
SBA H X
SF01201
1992 Feb 28
3
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS A0 - A7 B0 - B7 CPAB CPBA SAB SBA DIR OE A0 - A7 A inputs B inputs A-to-B clock input B-to-A clock input A-to-B select input B-to-A select input Data flow Directional control enable input Output Enable input A outputs DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.066 1.0/0.066 OC/106.7 LOAD VALUE HIGH/LOW 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A OC/64mA OC/64mA
B0 - B7 B outputs OC/106.7 NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High state and 0.6mA in the Low state. OC = Open Collector
FUNCTION TABLE
INPUTS OE X X H H L L L L = = = = = DIR X X X X L L CPAB X H or L X X CPBA X H or L X H or L SAB X X X X X X SBA X X X X L H Input Unspecified* Input Output DATA I/O A0-A7 B0-B7 Unspecified* Input Input Input Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus OPERATING MODE
H L X *
H H or L X L X Input Output Real time A data to B bus Real time A data to B bus H X X H X Stored A data to B bus Stored A data to B bus High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
LOGIC DIAGRAM - 74F647
OE DIR CPBA SBA CPAB SAB 21 3 23 22 1 2
LOGIC DIAGRAM - 74F649
OE DIR CPBA SBA CPAB SAB 21 3 23 22 1 2
1 of 8 Channels 1D C1 4 A0 1D C1 20 B0 4
1 of 8 Channels 1D C1
A0
20 1D C1
B0
To 7 other channels
SF01202
To 7 other channels
SF01203
1992 Feb 28
4
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to +VCC 128 0 to +70 -65 to +150 UNIT V V mA V mA C C
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK VOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output voltage Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 -18 4.5 64 70 NOM 5.0 MAX 5.5 V V V mA V mA C UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL IOH VO OL VI II IIH IIL ICC PARAMETER High-level output current Low level output voltage Low-level Input clamp voltage Input current at In ut maximum input voltage High-level input current Low-level input current Supply current (total) ICCH ICCL Others An, Bn TEST CONDITIONS1 VCC = MIN, VIL = MAX, VIH = MIN, VOH = MAX VCC = MIN, VIL = MAX VIH = MIN, IOL = 48mA IOL = 64mA VCC = MIN, II = IIK VCC = 0.0, VI = 7.0V VCC = 5.5V, VI = 5.5V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX 105 10%VCC 5%VCC 0.38 0.42 -0.73 LIMITS MIN TYP2 MAX 250 0.55 0.55 -1.2 100 1 20 -20 145 A V V V A mA A A mA UNIT
145 200 mA NOTES: 1. For conditions shown as MIN or Max, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C.
1992 Feb 28
5
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
AC ELECTRICAL CHARACTERISTICS
LIMITS S O SYMBOL PARAMETER S CONDITION O TEST CO Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum clock frequency Propagation delay CPAB to Bn or CPBA or An Propagation delay An to Bn or Bn to An Propagation delay SBA to An or SAB to Bn Propagation delay OE to An or Bn Propagation delay DIR to An or Bn Waveform 1 Waveform 1 Waveform 2 Waveform 3 Waveform 2 Waveform 3 Waveform 2 Waveform 3 Waveform 2 Waveform 3 50 7.0 5.5 7.5 4.0 7.5 4.0 9.0 6.5 9.0 7.0 TYP 65 12.0 8.5 10.5 7.0 11.5 7.0 13.0 10.0 13.0 15.0 15.0 11.0 13.5 9.5 14.5 9.5 16.0 12.5 16.0 18.0 MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 40 7.0 5.5 7.5 4.0 7.5 4.0 9.0 6.5 9.0 7.0 16.5 12.0 16.0 10.5 17.0 10.5 18.5 13.5 18.5 20.0 MAX MHz ns ns ns ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN ts(H) ts(L) ts(H) ts(L) tw(H) tw(L) Setup time, High or Low An to CPBA or Bn to CPAB Hold time, High or Low An to CPBA or Bn to CPAB Pulse width, High or Low CPAB or CPBA Waveform 4 Waveform 4 Waveform 1 4.0 4.0 0 0 4.5 6.0 TYP MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 5.0 5.0 0 0 4.5 6.5 MAX ns ns ns ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance.
An or Bn SBA or SAB
1/fMAX CPBA or CPAB VM tW(H) tPHL An or Bn VM VM tW(L) tPLH VM VM
VM tPHL
VM tPLH
Bn or An
VM
VM
An or Bn
SF00395
SF01161
Waveform 2. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
1992 Feb 28
6
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
AC WAVEFORMS (Continued)
For all waveforms, VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance.
An or Bn
VM tPLH
VM tPHL VM VM
SBA or SAB
An or Bn
VM ts(H)
VM th(H)
VM ts(L)
VM th(H)
Bn or An
An or Bn
CPBA or CPAB
VM
VM
SF00396
SF01165
Waveform 3. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn
Waveform 4. Data Setup and Hold Times
TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS
18 16
14 tPLH 12
10 PROPAGATION DELAY (ns) 8 tPHL
6
4
2
0 0 100 200 300 400 500 600 LOAD RESISTOR (W)
SF01208
NOTE: When using open-collector part, the value of the pull-up resistor greatly affects the value of the tPLH. For example, changing the pull-up resistor value from 500W to 100W will improve the tPLH up to 50% with only slight increase in the tPHL. However, if the pull-up resistor is changed, the user must take certain that the total IOL current through the resistor and the total IIL's of the receivers do not exceed the IOL maximum specification.
1992 Feb 28
7
Philips Semiconductors
Product specification
Octal transceivers/registers (open-collector)
74F647/74F649
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V)
90%
Test Circuit for Open Collector Outputs SWITCH POSITION TEST Open Collector All other SWITCH closed open
VM
Input Pulse Definition
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00195
1992 Feb 28
8
Philips Semiconductors
Product specification
Transceivers/registers
74F647, 74F649
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1992 Feb 28
9
Philips Semiconductors
Product specification
Transceivers/registers
74F647, 74F649
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1992 Feb 28
10
Philips Semiconductors
Product specification
Transceivers/registers
74F647, 74F649
NOTES
1992 Feb 28
11
Philips Semiconductors
Product specification
Transceivers/registers
74F647, 74F649
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05152
Philips Semiconductors
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